CPU Idle Latency on i.MX6UL/ULL

The i.MX6UL/ULL has the ability to put the CPU into a "Low Power Idle Mode". This happens after the CPU has been idle for some amount of time and reduces power consumption.

The downside of this behavior is the increased latency when returning from the idle into the active mode. There a certain use cases where this can be a problem.

Effects on RS485 Communication

In case of sending data via the i.MX UART controller using DMA and if no other process is running in the background to keep the CPU busy, the CPU goes idle after it has passed the data to the UART controller via DMA.

If the pause between passing the data and receiving the IRQ from the UART that signals the end of the transfer is long enough, the CPU will enter the "Low Power Idle Mode". Upon receiving the IRQ it takes several milliseconds to return the CPU to active state and until the DE pin can be reset to free the bus for other devices to send their messages.

This delay can therefore cause failures in RS485 communication.

Disabling "Low Power Idle Mode"

In case you don't need the power savings and want to avoid the wakeup latencies, you may decide to disable "Low Power Idle Mode".

To do this, you can either run:

echo 1 > /sys/devices/system/cpu/cpu0/cpuidle/state2/disable

or set the kernel commandline parameter:

cpuidle.off=1