Skip to content

KED Products Based on NXP i.MX8M Mini#

SoM Models#

Name Product # Description Delivery Settings
SL i.MX8M Mini Quad 40099 175 i.MX8MM SoM (Quad 1,6GHz, 1GB RAM, 8GB eMMC) Boot SD/SPI (MX8MM-bcf-1), MAC, Bootloader
SL i.MX8M Mini Quad 40099 185 i.MX8MM SoM (Quad 1,6GHz, 2GB RAM, 8GB eMMC) Boot SD/SPI (MX8MM-bcf-1), MAC, Bootloader
SL i.MX8M Mini Quad 40099 242 i.MX8MM SoM (Quad 1,6GHz, 2GB RAM, 32GB eMMC) Boot SD/SPI (MX8MM-bcf-1), MAC, Bootloader
SL i.MX8M Mini Quad 40099 212 i.MX8MM SoM (Quad 1,6GHz, 4GB RAM, 32GB eMMC) Boot SD/SPI (MX8MM-bcf-1), MAC, Bootloader
SL i.MX8M Mini Quad 40099 236 i.MX8MM SoM (Quad 1,6GHz, 4GB RAM, 32GB eMMC) OEM: No Boot-Fuses, No Software
OSM-S i.MX8M Mini Quad 40099 227 i.MX8MM SoM (Quad 1,6GHz, 1GB RAM, 8GB eMMC) Boot eMMC (MX8MM-bcf-5), MAC, Bootloader
OSM-S i.MX8M Mini Quad 40099 229 i.MX8MM SoM (Quad 1,6GHz, 2GB RAM, 8GB eMMC) Boot eMMC (MX8MM-bcf-5), MAC, Bootloader
OSM-S i.MX8M Mini Quad 40099 239 i.MX8MM SoM (Quad 1,6GHz, 2GB RAM, 16GB eMMC) Boot eMMC (MX8MM-bcf-5), MAC, Bootloader
OSM-S i.MX8M Mini Quad 40099 231 i.MX8MM SoM (Quad 1,6GHz, 4GB RAM, 32GB eMMC) Boot eMMC (MX8MM-bcf-5), MAC, Bootloader
OSM-S i.MX8M Mini Quad 40099 263 i.MX8MM SoM (Quad 1,6GHz, 4GB RAM, 32GB eMMC) OEM: No Boot-Fuses, No Software

Boards#

Name Product # SoM # Description
BL i.MX8M Mini Quad 40099 187 40099 175 Board with SoM (Quad 1,6GHz, 1GB RAM, 8GB eMMC)
BL i.MX8M Mini Quad 40099 220 40099 212 Board with SoM (Quad 1,6GHz, 4GB RAM, 32GB eMMC)

Demo Kits#

Name Product # Board # Description
DK i.MX8M Mini Quad 50099 059 40099 187 Demo-Kit (Quad 1,6GHz, 1GB RAM, 8GB eMMC)
DK i.MX8M Mini Quad 50099 065 40099 220 Demo-Kit (Quad 1,6GHz, 4GB RAM, 32GB eMMC)
DK 7" i.MX8M Mini Quad 50099 063 40099 187 Demo-Kit with 7"-Display (Quad 1,6GHz, 1GB RAM, 8GB eMMC)
DK 7" i.MX8M Mini Quad 50099 064 40099 220 Demo-Kit with 7"-Display (Quad 1,6GHz, 4GB RAM, 32GB eMMC)

Devices#

Name Product # Board # Description
AL i.MX8M Mini 1GB/8GB 50099 067 40099 187 Board with DIN Rail Housing (Quad 1,6GHz, 1GB RAM, 8GB eMMC)
AL i.MX8M Mini 4GB/32GB 50099 068 40099 220 Board with DIN Rail Housing (Quad 1,6GHz, 4GB RAM, 32GB eMMC)
DL 10" i.MX8M Mini 4GB/32GB 50099 900 40099 220 Board with Frame and 10" Touch Display (Quad 1,6GHz, 4GB RAM, 32GB eMMC)

Fuse Configuration#

Boot Config#

Index Register Name Offset Value Description
MX8MM-bcf-1 OCOTP_BOOT_CFG0
OCOTP_BOOT_CFG1
0x470
0x480
0x10001410
0x02000000
Boot from SD (SD2, 4bit buswidth, 3.3V), set BT_FUSE_SEL, Use SPI NOR as fallback (eCSPI1, CS0)
MX8MM-bcf-2 OCOTP_BOOT_CFG0 0x470 0x10006000 Boot from SPI NOR (eCSPI1, CS0), set BT_FUSE_SEL, No fallback
MX8MM-bcf-3 OCOTP_BOOT_CFG0
OCOTP_BOOT_CFG1
0x470
0x480
0x10002020
0x02000000
Boot from eMMC (SD1, 8bit buswidth, 3.3V), set BT_FUSE_SEL, Use SPI NOR as fallback (eCSPI1, CS0)
MX8MM-bcf-4 OCOTP_BOOT_CFG0 0x470 0x10002020 Boot from eMMC (SD1, 8bit buswidth, 3.3V), set BT_FUSE_SEL, No fallback
MX8MM-bcf-5 OCOTP_BOOT_CFG0 0x470 0x100020A0 Boot from eMMC (SD1, 8bit buswidth, 3.3V, fastboot), set BT_FUSE_SEL, No fallback

Reserved fuse bits

The BOOT CFG registers contain already reserved fuse bits which are already factory programmed by NXP. Therefore a virgin device contains the following fuse bits for OCOTP_BOOT_CFG0 and OCOTP_BOOT_CFG1:

    OCOTP_BOOT_CFG0: 0x08000000
    OCOTP_BOOT_CFG1: 0x01000010

Bootloader offsets

  • SD card boot: 33k (0x8400)
  • SPI NOR boot: 1k (0x400)
  • eMMC boot without fastboot: 33k (0x8400)
  • eMMC boot with fastboot: 1k (0x400)

eMMC configuraton for booting from eMMC (Linux commands)

mmc bootbus set single_backward x1 x8 /dev/mmcblk0 # set 8-bit boot bus interface
mmc bootpart enable 1 0 /dev/mmcblk0 # enable mmcblk0boot0 partition no ack

ACK bit settings

The ack bit setting is only taken into account, when the eMMC is operating in fastboot mode. For reliable operation it is important to keep the ack mode setting of the eMMC and the configuration in OTP SOC in sync.

Unqiue IDs#

Programming Unique IDs in the OTPs is not rolled-out in Production

Currently KED factory production does not write the IDs to the OTPs. The following description is therefore a draft and will be implemented in factory software in 2024.

The KED Unique-IDs of the SoM and baseboard are stored in the OTP fuses.

ID Fuse Register Format
KED SoM Unique ID GP1 Integer, Big-Endian
KED Board Unique ID GP2 Integer, Big-Endian

Layout and Connectors#

BL i.MX8MM Connectors Layout

BL i.MX8MM Connectors Pinout

BL i.MX8MM Connector 2x4 Pin Numbers

Digital IOs#

Four digital inputs/outputs are available. The table below shows number and function of available DIOs and their associated GPIOs.

Each DIO has one GPIO that switches a MOSFET driver against the supply (24V) rail and another GPIO to read back the voltage level via a resistor divider.

DIO circuit

DIO Name Function GPIO Name GPIO Label GPIO Device GPIO Offset Connector
DIO1 drive GPIO1_IO03 - gpiochip0 3 X13 - Pin 1
DIO1 read GPIO1_IO06 - gpiochip0 6 X13 - Pin 1
DIO2 drive GPIO1_IO07 - gpiochip0 7 X13 - Pin 3
DIO2 read GPIO1_IO08 - gpiochip0 8 X13 - Pin 3
DIO3 drive GPIO1_IO09 - gpiochip0 9 X13 - Pin 5
DIO3 read GPIO1_IO10 - gpiochip0 10 X13 - Pin 5
DIO4 drive GPIO1_IO11 - gpiochip0 11 X13 - Pin 7
DIO4 read GPIO5_IO02 - gpiochip4 2 X13 - Pin 7

Serial Devices#

Below you will find an overview which serial device has which name in the OS and belongs to which UART device of the iMX8 CPU.

UART Type Accessible via Connector
UART 1 RS232 /dev/ttymxc0 X11
UART 2 RS485 /dev/ttymxc1 X12
UART 3 UART/TTL (Debug UART) /dev/ttymxc2 X3 (USB Mini-B)

CAN-Bus Interface#

The device has one CAN-Bus interface. The device is present after boot, but is not enabled by default.

Name Accessible via Connector
CAN can0 X12